A key requirement for SDH equipment is to offer compatibility with functions provided by the existing Plesiochronous Digital Hierarchy (PDH) networks. Accurate network timing is needed for some applications, where phase information is critical in the timing component of the delivered signal. Such timing is usually transported and delivered in existing networks, as a component of information within the primary rate traffic signal. Normally the primary rate traffic signal is nominally at 2 Mbit/s. For the purpose of this specification it will be assumed that the 2 Mbit/s signal is the primary rate signal. However this is not a factor in the actual basis of the present invention as in principle such timing can be transported and delivered at any frequency or can be derived from any constant digital bit rate, and then rescaled to the appropriate frequency for local use.
Where accurate network timing is lost the consequence is either a reduction of performance margins at some point in the network, leading to an increased risk of digital errors as normal parameter variation occurs, or else to errors being directly introduced--usually at a low rate of occurrence, but nonetheless unacceptable for critical applications.
For some applications the delivery of accurate network timing is now widely accepted as being unavailable in SDH, at least in the way in which timing is transported in the PDH network, as a component of the 2 Mbit/s signal carried across the network.
In SDH the 2 Mbit/s signal is transported in a virtual container (VC), whose location in time in relation to a frame timing reference, is defined by a pointer. Pointer adjustments in SDH produce phase disturbances in the timing component of the delivered 2 Mbit/s, which can cause problems in establishing network synchronisation, for example with exchange synchronisation arrangement. Good timing delivery is possible in principle over a point-to-point link, because pointers are not expected to change here, but in real networks it is necessary to allow for transmission via add-drop multiplexers (muxes), hubs, cross-connects, etc. all of which may introduce changes in the values of pointers attached to VCs.
Discussions are continuing to establish accepted standards on ways to modify SDH in order to overcome this problem, but techniques proposed so far generally require that all nodes along an SDH path be equipped with conforming equipment, which effectively means that these techniques be approved as standards. Such solutions may be impractical because of the existence of significant quantities equipment to the initial standard.
In the absence of such new techniques, the distribution of network timing over SDH networks is assumed to be via the SDH optical bearer usually with dedicated clock outlets driven at a primary rate--2048 or 1544 kbit/s as appropriate for the territory--from the received bearer timing after rescaling from its transmission bit rate. Only one or two such outlets would normally be fitted per equipment and they would be usable only by equipment which had been designed to accept timing via ports which are separate from data ports.
These outlets would be of no practical use in one of the most likely situations, where a customer is connected to an SDH element in the network, via a conventional 2 Mbit/s link over for example a copper pair, an optical fibre or a radio bearer. In these cases the provision of another 2 Mbit/s connection just for timing purposes would be uneconomic; in effect those customer services which require network-synchronous operation would suffer a severe cost penalty.
In the applicants earlier UK Patent No. GB 2,257,603 there is described an arrangement in which buffers are provided at the final termination of the SDH path in the path of the extracted 2 Mbit/s or primary rate data signal, in order to smooth out short term phase disturbances. However, in certain circumstances such a buffer can be overloaded and thus overflow and this in turn will result in data corruption. That Patent discloses an arrangement in which there is an overflow detector to prevent such a buffer from overflowing.
In SDH, a method exists to carry primary rate signals, at 1.544 Mbit/s or 2.048 Mbit/s, within a synchronous frame structure. The technical details for this process are well documented in International Standards (ITU TSS Recommendations G.707, G.708 and G.709). However, these signals can, under normal conditions, experience phase steps of up to 8 .mu.s in a period of a few seconds. If the externally connected exchange equipment is intolerant to sudden changes in phase, the signal will be rejected as faulty. To prevent this problem a primary rate re-timing buffer can be employed at the terminating end of an SDH traffic path which smooths out short term phase disturbances. Using a pointer cancelling technique within these buffers (see the Applicants UK Patent Application No. GB 2300543), an operator can pass primary rate timing from a network synchronised to one frequency (f1), via an SDH network synchronised to a difference frequency (f2). If f1 equals f2 then the primary rate timing can be carried via the SDH bearer (see the Applicants UK Patent No. GB 2,257,603)
However, these techniques may not be adequate when a long term and severe synchronisation failure occurs in the SDH transmission system. In such a situation the re-timing buffers will tend to fill or empty in one direction and therefore a mechanism is required to avoid an overflow or underflow occurring and causing loss of traffic. Even if the synchronisation failure does not last long enough to threaten an overflow/underflow, nevertheless the buffer can be left in a less than ideal position by being near either its upper or lower capacity limits. An object of the present invention is to provide a method of, and apparatus for overcoming overflow/underflow problems of a primary rate re-timing buffer in an SDH system.